20 research outputs found

    Design and Implementation of Complexity Reduced Digital Signal Processors for Low Power Biomedical Applications

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    Wearable health monitoring systems can provide remote care with supervised, inde-pendent living which are capable of signal sensing, acquisition, local processing and transmission. A generic biopotential signal (such as Electrocardiogram (ECG), and Electroencephalogram (EEG)) processing platform consists of four main functional components. The signals acquired by the electrodes are amplified and preconditioned by the (1) Analog-Front-End (AFE) which are then digitized via the (2) Analog-to-Digital Converter (ADC) for further processing. The local digital signal processing is usually handled by a custom designed (3) Digital Signal Processor (DSP) which is responsible for either anyone or combination of signal processing algorithms such as noise detection, noise/artefact removal, feature extraction, classification and compres-sion. The digitally processed data is then transmitted via the (4) transmitter which is renown as the most power hungry block in the complete platform. All the afore-mentioned components of the wearable systems are required to be designed and fitted into an integrated system where the area and the power requirements are stringent. Therefore, hardware complexity and power dissipation of each functional component are crucial aspects while designing and implementing a wearable monitoring platform. The work undertaken focuses on reducing the hardware complexity of a biosignal DSP and presents low hardware complexity solutions that can be employed in the aforemen-tioned wearable platforms. A typical state-of-the-art system utilizes Sigma Delta (Σ∆) ADCs incorporating a Σ∆ modulator and a decimation filter whereas the state-of-the-art decimation filters employ linear phase Finite-Impulse-Response (FIR) filters with high orders that in-crease the hardware complexity [1–5]. In this thesis, the novel use of minimum phase Infinite-Impulse-Response (IIR) decimators is proposed where the hardware complexity is massively reduced compared to the conventional FIR decimators. In addition, the non-linear phase effects of these filters are also investigated since phase non-linearity may distort the time domain representation of the signal being filtered which is un-desirable effect for biopotential signals especially when the fiducial characteristics carry diagnostic importance. In the case of ECG monitoring systems the effect of the IIR filter phase non-linearity is minimal which does not affect the diagnostic accuracy of the signals. The work undertaken also proposes two methods for reducing the hardware complexity of the popular biosignal processing tool, Discrete Wavelet Transform (DWT). General purpose multipliers are known to be hardware and power hungry in terms of the number of addition operations or their underlying building blocks like full adders or half adders required. Higher number of adders leads to an increase in the power consumption which is directly proportional to the clock frequency, supply voltage, switching activity and the resources utilized. A typical Field-Programmable-Gate-Array’s (FPGA) resources are Look-up Tables (LUTs) whereas a custom Digital Signal Processor’s (DSP) are gate-level cells of standard cell libraries that are used to build adders [6]. One of the proposed methods is the replacement of the hardware and power hungry general pur-pose multipliers and the coefficient memories with reconfigurable multiplier blocks that are composed of simple shift-add networks and multiplexers. This method substantially reduces the resource utilization as well as the power consumption of the system. The second proposed method is the design and implementation of the DWT filter banks using IIR filters which employ less number of arithmetic operations compared to the state-of-the-art FIR wavelets. This reduces the hardware complexity of the analysis filter bank of the DWT and can be employed in applications where the reconstruction is not required. However, the synthesis filter bank for the IIR wavelet transform has a higher computational complexity compared to the conventional FIR wavelet synthesis filter banks since re-indexing of the filtered data sequence is required that can only be achieved via the use of extra registers. Therefore, this led to the proposal of a novel design which replaces the complex IIR based synthesis filter banks with FIR fil-ters which are the approximations of the associated IIR filters. Finally, a comparative study is presented where the hybrid IIR/FIR and FIR/FIR wavelet filter banks are de-ployed in a typical noise reduction scenario using the wavelet thresholding techniques. It is concluded that the proposed hybrid IIR/FIR wavelet filter banks provide better denoising performance, reduced computational complexity and power consumption in comparison to their IIR/IIR and FIR/FIR counterparts

    Multiplier Free Implementation of 8-tap Daubechies Wavelet Filters for Biomedical Applications

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    Due to an increasing demand for on-sensor biosignal processing in wireless ambulatory applications, it is crucial to reduce the power consumption and hardware cost of the signal processing units. Discrete Wavelet Transform (DWT) is very popular tool in artifact removal, detection and compression for time-frequency analysis of biosignals and can be implemented as two-branch filter bank. This work proposes a new, completely multiplier free filter architecture for implementing Daubechies wavelets which targets Field-Programmable-Gate-Array (FPGA) technologies by replacing multipliers with Reconfigurable Multiplier Blocks (ReMBs). The results have shown that the proposed technique reduces the hardware complexity by 40% in terms of Look-Up Table (LUT) count and can be used in low-cost embedded platforms for ambulatory physiological signal monitoring and analysis

    Area and Power Efficient Implementation of db4 Wavelet Filter Banks for ECG Applications Using Reconfigurable Multiplier Blocks

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    There is an increasing demand for wavelet-based real-time on-node signal processing in portable medical devices which raises the need for reduced hardware size, cost and power consumption. This paper presents an improved Reconfigurable Multiplier Block (ReMB) architecture for an 8-tap Daubechies wavelet filter employed in a tree structured filter bank which targets the recent Field-Programmable-Gate-Array (FPGA) technologies. The ReMB is used to replace the expensive and power hungry multiplier blocks as well as the coefficient memories required in time-multiplexed finite impulse response filter architectures. The proposed architecture is implemented on a Kintex-7 FPGA and the resource utilization, maximum operating frequency and the estimated dynamic power consumption figures are reported and compared with the literature. The results demonstrated that the proposed architecture reduces the hard- ware utilization by 30% and improves the power consumption by 44% in comparison to architectures with general purpose multipliers. Thus, the proposed implementation can be deployed in low-cost low-power embedded platforms for portable medical devices

    IIR Wavelet Filter Banks for ECG Signal Denoising

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    ElectroCardioGram (ECG) signals are widely used for diagnostic purposes. However, it is well known that these recordings are usually corrupted with different type of noise/artifacts which might lead to misdiagnosis of the patient. This paper presents the design and novel use of Infinite Impulse Response (IIR) filter based Discrete Wavelet Transform (DWT) for ECG denoising that can be employed in ambulatory health monitoring applications. The proposed system is evaluated and compared in terms of denoising performance as well as the computational complexity with the conventional Finite Impulse Response (FIR) based DWT systems. For this purpose, raw ECG data from MIT-BIH arrhythmia database are contaminated with synthetic noise and denoised with the aforementioned filter banks. The results from 100 Monte Carlo simulations demonstrated that the proposed filter banks provide better denoising performance with fewer arithmetic operations than those reported in the open literature

    Hybrid IIR/FIR Wavelet Filter Banks for ECG Signal Denoising

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    ElectroCardioGram (ECG) signals are usually corrupted with various types of artifacts which degrade the signal quality and might lead to misdiagnosis. The wavelet denoising technique is widely studied in the artifact removal literature which employs conventional Finite Impulse Response (FIR) wavelet filter banks for decomposing, thresholding and reconstructing the noisy signal to obtain high fidelity and clean ECG signal. However, the use of high order FIR wavelet filters increases the hardware complexity and cost of the system. This paper presents novel hybrid Infinite Impulse Response (IIR)/FIR Discrete Wavelet Transform (DWT) filter banks that can be employed in ambulatory health monitoring applications for denoising purposes. The proposed systems are evaluated and compared to the conventional FIR based DWT systems in terms of the computational complexity as well as the denoising performance. The results from 100 Monte Carlo simulations demonstrated that the proposed filter banks provide better denoising performance with fewer arithmetic operations than those reported in the open literature

    Low Complexity All-Pass Based Polyphase Decimation Filters for ECG Monitoring

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    This paper presents a low complexity high efficiency decimation filter which can be employed in EletroCardioGram (ECG) acquisition systems. The decimation filter with a decimation ratio of 128 works along with a third order sigma delta modulator. It is designed in four stages to reduce cost and power consumption. The work reported here provides an efficient approach for the decimation process for high resolution biomedical data conversion applications by employing low complexity two-path all-pass based decimation filters. The performance of the proposed decimation chain was validated by using the MIT-BIH arrhythmia database and comparative simulations were conducted with the state of the art
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